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Dependable design in VLSI system
The recent development of VLSI technology enable us to product very large and complex integration circuits such as SoC (System on a Chip). However, it brings reliability degradation. Today, it is difficult to obtain dependable VLSIs. For example, manufactured chips of about ten percent does not operate completely because of defects. Test cost may account for the half or more of manufacturing cost. In our laboratory, we study dependable design in VLSI system, e.g. Design for Test (DFT) and soft error tolerant design for ASIC and reconfigurable devices.
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Prototype of VLSI with a proposed dependable design
(Adviser: K. NAMBA)
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